1. Field of the Invention
The present invention relates to an apparatus and method for digital modulation and, more particularly, to an apparatus and method for digital modulation in which a plurality of different sampling frequencies are used for digital modulation.
2. Description of the Background Art
Conventionally, a digital modulator is used in a transmitter in a digital cable television set-top box, a transmitter in a digital satellite broadcasting, and the like. For example, as disclosed in FIG. 1 of Japanese Laid-Open Patent Publication No. 11-163953, a digital modulator performs interpolation using interpolators and filters. Hereinafter, with reference to FIG. 3, a digital quadrature modulator disclosed in Japanese Laid-Open Patent Publication No. 11-163953 is described. FIG. 3 is a block diagram illustrating an exemplary conventional digital quadrature modulator.
As illustrated in FIG. 3, the conventional digital quadrature modulator includes input terminals 101 and 105, an output terminal 111, interpolators 102 and 106, digital filters 103 and 107 with an operating frequency of fs2, digital multipliers 104 and 108, a digital adder 109, and a digital-to-analog converter 110. The input terminal 101 is connected to the interpolator 102. The interpolator 102 is connected to the filter 103. The filter 103 is connected to the multiplier 104. The multiplier 104 is connected to the adder 109. Similarly, the input terminal 105 is connected to the interpolator 106. The interpolator 106 is connected to the filter 107. The filter 107 is connected to the multiplier 108. The multiplier 108 is connected to the adder 109. The adder 109 is connected to the digital-to-analog converter 110. The digital-to-analog converter 110 is connected to the output terminal 111.
In the following description of an operation of the digital quadrature modulator, fsa and fsb (fsa=fsb/4) represent sampling frequencies, and fc (fc=fsb/4) represents a carrier frequency. In-phase component data with a sampling frequency of fsa is inputted to the interpolator 102 via the input terminal 101. This input data is frequency-converted by the interpolator 102 to have a sampling frequency of fsb and supplied to the filter 103. The filter 103 removes an unnecessary frequency component from the supplied data and outputs the resulting data to the multiplier 104. In a similar manner, quadrature component data with a sampling frequency of fsa is inputted to the interpolator 106 via the input terminal 105. This input data is frequency-converted by the interpolator 106 to have a sampling frequency of fsb and supplied to the filter 107. The filter 107 removes an unnecessary frequency component from the supplied data and outputs the resulting data to the multiplier 108. The multiplier 104 multiplies the in-phase component data, which has been frequency-converted to have the sampling frequency of fsb, by cos(2·π·fc·T), where T=n/fsb (n: integer). The multiplier 108 multiplies the quadrature component data by sin(2·π·fc·T). The data multiplied by the multiplier 104 and the data multiplied by the multiplier 108 are supplied to the adder 109, where the two pieces of data are added to each other, and the resulting data is supplied to the digital-to-analog converter 110. The digital-to-analog converter 110 converts the supplied data to analog data, and outputs via the output terminal 111 the analog data, which has been subjected to quadrature modulation. Thus, in the conventional digital quadrature modulator, interpolated output is obtained by employing a single or multiple sampling frequencies having a fixed value.
Here, the frequency (sampling frequency) of an operating clock of the digital-to-analog converter when converting the data to analog data is fixed in accordance with the carrier system, for example, at 200 MHz. In addition, data inputted to the interpolators has a symbol rate in accordance with the standard of the interpolators. This symbol rate is, for example, 0.772 MHz or 1.544 MHz. The interpolators perform oversampling so that the data having such a symbol rate will have a frequency close to the frequency of the operating clock of the digital-to-analog converter 110 when converting the data to the analog data. However, the frequency resulting from this frequency conversion by the interpolators is an integral multiple of the input frequency. Therefore, the interpolators are incapable of performing oversampling such that the resulting frequency would be exactly equal to the frequency of the operating clock of the digital-to-analog converter 110 when converting the data to the analog data. Specifically, for the symbol rate of 0.772 MHz, the sampling rate will be 0.772*256=197.632 MHz. For the symbol rate of 1.544 MHz, the sampling rate will be 1.544*128=197.632 MHz. If data having such a sampling rate is converted by the digital-to-analog converter to analog data, the modulated output may contain spurious.